ARCADE ROMS

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Below is a table representhing the roms for Battle Garegga (Europe / USA / Japan / Asia) (Sat Feb 3 1996) and its clones (if any). Red roms are similar between all versions but green roms differ, which means that if you wish to change the game's region or language, it may be possible make the change simply by reprogramming fresh roms with other version's contents.

Note that the rom information displayed here is automatically parsed from Multiple Arcade Machine Emulator (www.mame.net) C source code, so some of it can be incorrect. However, if you notice that some parts of the data are constantly incorrectly displayed in more than one game, please contact me so that I can fix the problem.

You might also be interested in this game's dip switches.

battleg Battle Garegga - Type 2 (Denmark / China) (Tue Apr 2 1996)   CPU1 chips: u123 8x512kbits 0x000000 -> u65 8x512kbits 0x000001 ->   CPU2 chips: snd.bin 8x32kbits 0x00000 ->   GFX1 chips: rom4.bin 8x2Mbits 0x000000 -> rom3.bin 8x2Mbits 0x200000 -> rom2.bin 8x2Mbits 0x400000 -> rom1.bin 8x2Mbits 0x600000 ->   GFX2 chips: text.u81 8x32kbits 0x00000 ->   SOUND1 chips: rom5.bin 8x1Mbits 0x040000 ->

battlega Battle Garegga (Europe / USA / Japan / Asia) (Sat Feb 3 1996)   CPU1 chips: prg0.bin 8x512kbits 0x000000 -> prg1.bin 8x512kbits 0x000001 ->   CPU2 chips: snd.bin 8x32kbits 0x00000 ->   GFX1 chips: rom4.bin 8x2Mbits 0x000000 -> rom3.bin 8x2Mbits 0x200000 -> rom2.bin 8x2Mbits 0x400000 -> rom1.bin 8x2Mbits 0x600000 ->   GFX2 chips: text.u81 8x32kbits 0x00000 ->   SOUND1 chips: rom5.bin 8x1Mbits 0x040000 ->

battlegb Battle Garegga (Austria / Hong Kong) (Sat Mar 2 1996)   CPU1 chips: prg_0.bin 8x512kbits 0x000000 -> prg_1.bin 8x512kbits 0x000001 ->   CPU2 chips: snd.bin 8x32kbits 0x00000 ->   GFX1 chips: rom4.bin 8x2Mbits 0x000000 -> rom3.bin 8x2Mbits 0x200000 -> rom2.bin 8x2Mbits 0x400000 -> rom1.bin 8x2Mbits 0x600000 ->   GFX2 chips: text.u81 8x32kbits 0x00000 ->   SOUND1 chips: rom5.bin 8x1Mbits 0x040000 ->

battlegc Battle Garegga (Austria / Hong Kong) (Sat Feb 3 1996)   CPU1 chips: prg_0.rom 8x512kbits 0x000000 -> prg_1.rom 8x512kbits 0x000001 ->   CPU2 chips: snd.bin 8x32kbits 0x00000 ->   GFX1 chips: rom4.bin 8x2Mbits 0x000000 -> rom3.bin 8x2Mbits 0x200000 -> rom2.bin 8x2Mbits 0x400000 -> rom1.bin 8x2Mbits 0x600000 ->   GFX2 chips: text.u81 8x32kbits 0x00000 ->   SOUND1 chips: rom5.bin 8x1Mbits 0x040000 ->